The present invention relates to a semiconductor integrated circuit device, and more particularly to techniques which are especially effective when applied to an address change-over system in a semiconductor memory device (hereinbelow, termed "memory"). By way of example, the techniques are effectively utilized for an LSI (large-scale integrated circuit) which has a built-in rewritable ROM (Read Only Memory).
In a conventional LSI such as single-chip microcomputer having a built-in EPROM (Erasable Programmable ROM) in which FAMOS (floating-gate avalanche injection MOS) FETs are used as storage elements, addresses have been common to the operation of reading data from within the EPROM and the operation of writing data into the EPROM by means of an EPROM writer, and both the reading and writing of the data have been performed in, for example, 8-bit unit. Refer to, for example, "Hitachi Microcomputer Data Book, 8-bit Single Chip" p. 823-861issued by Hitachi, Ltd. in August 1984.
With enhancements in the functions of the single-chip microcomputer, the internal data bus of the LSI is sometimes configured of 16 bits so that data can be read out of the EPROM in word (16-bit) unit.
In this case, without any contrivance, data cannot be written into the built-in EPROM by the use of the conventional EPROM writer for 8 bits. It is accordingly necessary to develop an EPROM writer for 16 bits anew or to cope with the situation through software so that the data can be written using the EPROM writer for 8 bits.
However, the method in which the EPROM writer for 16 bits is developed anew is costly. On the other hand, the method in which the situation is coped with in software fashion has the drawback that a period of time required for the writing becomes longer.
Moreover, in a case where the capacity of the internal data bus of the LSI having the built-in EPROM is to be more enlarged into 32 bits, it is necessitated to develop an EPROM writer again or to alter the software.